NEC uPD861C PLL周波数シンセサイザ - 丹青通商

NEC uPD861C PLL周波数シンセサイザ


■NEC uPD861C PLL周波数シンセサイザ

> Programmable Divider - Divide by 3 to 255
> 10-Bit Divider
> Phase Detector
> Reference Oscillator Circuit
> On-Chip Filter Amplifier
> Code Converter
> Only Two or Three Crystals Required for CD Radio AM Frequency Selection
> Unlocked Signals are Detected at Instant Stop "IS" Terminal
> Two Type Program Mode can be Selected to Change Input Mode Level:
> M: Low Level - Binary Code Input Enables, Divided by 3 to 255
> M: High Level - BCD Code Enables that the Data at P1 to P6 Port is Offset 90 by Code Converter
> Internal Active Filter Amplifier has a Long Holding Time due to Very High Input Impedance
> Characteristics of the CMOS - this is to Obtain Very Good Spurious Response
> Output Signal of the "I" can be Used to Stop the Spurious Radiation when the Channel Selector Makes
> Misprogramming such as Rotary Switch's Lose Contact
> High Speed and Low Power Consumption due to CMOS
> Single Power Supply and Fully TTL Compatible: VDD = 5V ±0.5V
> Operating Temperature: TA = -30° to +65°C
> Pull Down Resistors Installed in Program and Mode Switch Inputs